6月1日至5日，第37屆國際功率半導體器件和集成電路年會（IEEE ISPSD，IEEE The 37th International Symposium on Power Semiconductor Devices and ICs）在日本召開。IEEE ISPSD是功率半導體領域最具影響力的國際學術(shù)會議，被譽為該領域的“奧林匹克”盛會。此次會議吸引了來自全球的672名學者和工程技術(shù)人員參與，共發(fā)表了來自16個國家和地區(qū)的176篇學術(shù)論文，展示了全球功率半導體技術(shù)的最新研究進展。

電子科技大學集成電路學院功率集成技術(shù)實驗室（PITeL）主任張波教授帶領團隊25名師生參加了此次盛會，與全球同行分享了功率半導體的最新成果，共錄用21篇論文（其中牽頭發(fā)表16篇，含4篇Oral報告和12篇Poster論文），占全球發(fā)文總量的11.9%，無論是第一單位發(fā)表論文數(shù)還是發(fā)表論文總數(shù)均居全球第一。這是實驗室自2013年以來第9次發(fā)表論文數(shù)位居全球第一。

功率集成技術(shù)實驗室25名師生參加第37屆IEEE ISPSD國際會議

功率集成技術(shù)實驗室作為“功率半導體領域研究最為全面的學術(shù)團隊”，在功率半導體領域具備40余年深厚學術(shù)積淀，入選論文主題涵蓋了低壓功率器件（LVT）、氮化鎵功率器件（GaN）、功率集成電路設計（ICD）、碳化硅器件（SiC）和高壓器件（HV）等重要領域，深入探討了硅基/寬禁帶功率半導體理論、器件新結(jié)構(gòu)、功率集成技術(shù)、功率IC設計技術(shù)、可靠性等核心議題。

功率集成技術(shù)實驗室牽頭的4篇Oral報告

陳星弼院士發(fā)明的“超結(jié)”，被國際譽為“功率MOS的里程碑”。功率集成技術(shù)實驗室長期堅持功率超結(jié)器件研究，章文通教授在其Oral報告中將超結(jié)理論推廣應用于SOI材料，與合作企業(yè)一起創(chuàng)建了國內(nèi)首個高溫高壓超結(jié)SOI BCD工藝平臺，核心器件功率優(yōu)值（FOM）達15.76 MW/cm²，也是國際首個FOM > 15 MW/cm²的硅基高壓集成器件，并已通過175℃高溫HTRB等可靠性考核，為國內(nèi)車規(guī)級高溫高壓SOI基BCD工藝技術(shù)奠定了基礎。在超結(jié)分立器件方面，實驗室報道了600~1500 V超結(jié)器件，重點探討了其開關特性和電磁干擾（EMI）優(yōu)化等最新技術(shù)，并首次引入神經(jīng)網(wǎng)絡AI工具指導分立超結(jié)器件的設計和流片。

功率集成技術(shù)實驗室牽頭的12篇Poster報告

實驗室積極開展寬禁帶功率半導體芯片研究，此次會議在GaN領域入選了3篇Oral文章，其中，陸毅博士報道了一種適用于寬電源電壓應用的單片集成GaN驅(qū)動器，聚焦高速全GaN單片驅(qū)動與智能保護，能滿足數(shù)據(jù)中心三次電源高頻GaN末級驅(qū)動應用需求；俞程博士創(chuàng)造性地提出在p-GaN HEMT緩沖層中引入空穴補償層（HC-HEMT），并首次在p-GaN柵HEMT中觀測到了類雪崩擊穿行為，所發(fā)現(xiàn)的新機制有效解決了傳統(tǒng)HEMT器件中無雪崩擊穿的問題，顯著提升了器件在重復過電壓條件下的耐受能力，為大幅提高GaN HEMT的可靠性開辟了新途徑；王釗博士則深入研究了總劑量輻射下p型柵氮化鎵HEMTs漏電流（Ioff）非單調(diào)退化效應，并揭示了其輻射損傷機制，為極端環(huán)境下器件可靠性的分析提供了重要支撐。

       自2006年功率集成技術(shù)實驗室在IEEE ISPSD論文實現(xiàn)零的突破以來，迄今已在該國際會議發(fā)表學術(shù)論文130余篇。在今年的ISPSD會議中，功率集成技術(shù)實驗室13名同學以第一作者發(fā)表了論文，充分展示了實驗室在人才培養(yǎng)方面的顯著成效。截至目前，實驗室已培養(yǎng)博士99名、碩士1288名。“功率半導體領域最大學術(shù)研究團隊”正不斷發(fā)展壯大，持續(xù)為全球功率半導體發(fā)展貢獻“成電力量”。

附錄：功率集成技術(shù)實驗室2025年IEEE ISPSD發(fā)表論文列表：

第一單位Oral

1. Wentong Zhang, Jiangnan Mu, et al., “Charge Field Modulation Mechanism and its Experiments in SJ-based SOI BCD Process,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 81-84, Kumamoto, Japan, 2025.

2. Yi Lu, Xin Ming, et al., “A Monolithic GaN IC with Temperature Compensated Active Clamp Driver and Short-Circuit Protection for Wide Power Supply Range,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 89-92, Kumamoto, Japan, 2025.

3. Zhao Wang, Qingchen Jiang, et al., “Mechanism of Leakage Current Degradation in p-GaN Gate HEMTs Under Gamma Irradiation,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 121-124, Kumamoto, Japan, 2025.

4. Cheng Yu, Wanjun Chen, et al., “ p-GaN Gate HEMT with the Buffer Hole Compensation Layer for Achieving Repetitive Avalanche-Like Breakdown Capability,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 701-704, Kumamoto, Japan, 2025.

第一單位Poster

1. Dingxiang Ma, Yuanqing Ye, et al., “Design and Performance Enhancement of Integrated Schottky Contact in Low-Voltage LDMOS on 55nm BCD Platform,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 153-156, Kumamoto, Japan, 2025.

2. Teng Liu, Hao Wang, et al., “High Reliability Tri-Zone Heterogeneous Charge Balanced SJ-LDMOS with Novel Silicon Rich Oxide and its Experimental Verification,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 157-160, Kumamoto, Japan, 2025.

3. Yun Dai, Zekun Zhou, et al., “An On-Chip Tunable Negative Power Supply Within SiC MOSFET Gate Driver for Spurious Conduction Suppression and Reliable Driving,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 161-164, Kumamoto, Japan, 2025.

4. Yuhan Chen, Xin Ming, et al., “A High Precision and Robustness Isolated Analog Signal Sensing for Monitoring Power Stages,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 181-184, Kumamoto, Japan, 2025.

5. Lei Tang, Jinggui Zhou, et al., “A Comprehensive Study on Device Reliability and Failure Mechanism of 650V p-GaN Gate HEMTs Under Long-Term HTRB Stress Beyond 150 ℃,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 189-192, Kumamoto, Japan, 2025.

6. Jinggui Zhou, Shuting Huang, et al., “Self-Aligned p-GaN Gate Controlled Diodes with Tunable Forward Conduction/Reverse Blocking Properties for High Efficiency Buck Converter,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 197-200, Kumamoto, Japan, 2025.

7. Ruize Sun, Renjie Wu, et al., “Experiment and Simulation Study of Single-Event Burnout in GaN Event-Triggering HEMTs,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 221-224, Kumamoto, Japan, 2025.

8. Huan Gao, Xin Zhou,, et al., “Heavy-Ion Radiation-Induced Dynamic On-Resistance Degradation for P-GaN Gate HEMTs,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 233-236, Kumamoto, Japan, 2025.

9. Zhuocheng Wang, Wanjun Chen, et al., “High Performance p-GaN Gate HEMT with TiNxOy Resistive Field Plate Structure,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 305-308, Kumamoto, Japan, 2025.

10. Tongyang Wang, Zehong Li, et al., “A Superjunction MOSFET with Self-Adjustable Electron Path for Low Reverse Recovery Charge,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 437-440, Kumamoto, Japan, 2025.

11. Guoliang Yao, Ming Qiao, and Bo Zhang. “Fabrication and Optimization of 1550 V Semi-Superjunction MOSFET with Ultra-Low Specific On-Resistance and Enhanced Switching Performance,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 441-444, Kumamoto, Japan, 2025.

12. Jiahao Hu, Xiaochuan Deng, et al., “An In-Depth Investigation of Gate Ringing Induced by Total Ionizing Dose in SiC MOSFETs,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 577-580, Kumamoto, Japan, 2025.

參與單位Oral

1. Jiajun Han, et al., “3 kV/2.9 mΩ·cm² β-Ga?O? Vertical p–n Heterojunction Diodes with Helium-Implanted Edge Termination and Oxygen Post Annealing,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 357-360, Kumamoto, Japan, 2025.

參與單位Poster

1. Yeying Huang, et al., “Enhancing Key Performance of Vertical p-NiO/n-GaN Heterojunction Diodes Through Plasma Treatment and Oxygen Post-Annealing,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 333-336, Kumamoto, Japan, 2025.

2. Jinpei Lin, et al., “Enhancing Key Performance of Vertical GaN MOS Capacitors Through GaOx Interface Technology,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 337-340, Kumamoto, Japan, 2025.

3. Ping Li, et al., “Low EMI Noise Superjunction MOSFET with an N-Dot Region in the P-Pillar,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 421-424, Kumamoto, Japan, 2025.

4. Jing Chen, et al., “Intelligent Design of Superjunction Devices based on Physics-Informed Neural Network,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 449-454, Kumamoto, Japan, 2025.

來源：電子科技大學集成電路學院